Recently, the fourth generation of double data rate dynamic random access memory (“DDR4 SDRAM” or “DDR4”) has become commercially available as a particular implementation of dynamic random access memory (DRAM) in computing devices (e.g., personal computers, workstations, servers, etc). Compared to previous generations, DDR4 SDRAM offers higher data transfer speeds and module densities, lower voltage requirements, and larger bandwidths. DDR4, as with previous generations and variant incarnations of DRAM, is most often implemented as memory integrated circuits incorporated on a memory module, most recently a dual in-line memory module (“DIMM”). DIMMs are most often attached to the main printed circuit board (“motherboard”) of a computing device through one or more sockets. Typically, each DIMM includes a memory controller—a digital circuit that manages the flow of data going to and from the memory chips in the module. Alternately, the memory controller can be a separate chip or integrated into another chip on the motherboard.
Traditional information technology storage devices and servers are generally based on central processing units (CPUs) with dedicated single-port DDRx-DIMMs of DRAM plus periphery storage devices. For higher reliability, availability, serviceability, and performance storage systems, advanced technologies such as dual-port devices, dual-port serially-attached SCSI (“SAS”) devices and/or dual-port non-volatile memory-express (“NVME”) devices may be used instead.
While traditionally reserved to volatile memories, non-volatile random access memory DIMMS are beginning to emerge. NAND-Flash memory is one type of non-volatile block access memory, and flash memory chips are commonly used in data storage devices such as solid-state drives (SSD). New type non-volatile random access memories include Magnetoresistive Random-access Memory (MRAM) and Resistive Random-Access Memory (RRAM or ReRAM), each with their own advantages and disadvantages.
However, currently available RRAM, MRAM and NAND-Flash memory chips do not support the DDR4 interface. As such, these non-volatile memory chips cannot take advantage of the benefits of the current generation of DDR4 SDRAM interfaces. For example, a DDR3-SSD DIMM device with a DDR3-to-SATA interface using two SATA-SSD controllers and 8 NAND flash chips is built with throughput that is less than 10% of DDR3 bus bandwidth of a 3DPC (3 DIMMs per 64 bit channel) memory.
Recent dual-port NVME-SSD devices include PCIE periphery interfaces with direct memory access (DMA) transferring data packets to/from SSD units to/from host memory, at the lowest bus priority, due to having to wait for CPU cores using memory first. Moreover, only a limited number of NAND flash chips are typically used due to the potential latency from the lack of bus priority. As such these techniques offer only limited total storage capacity and I/O bandwidth.